Information processing apparatus that displays image data

ABSTRACT

An information processing apparatus includes a first system and a second system. The first system includes a CPU capable of executing an operating system, a first display controller that causes a display device to display data, a peripheral device having an interface and being capable of outputting image data via the interface, and a first controller that executes communication with the peripheral device via the interface and receives the image data output from the peripheral device. The second system includes a second controller that executes communication with the peripheral device via the interface and receives the image data output from the peripheral device, a second display controller that causes the display device to display the image data, which is received by the second controller, and a switch device that switches a destination of connection of the interface of the peripheral device from the first controller to the second controller.

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based upon and claims the benefit of priorityfrom the prior Japanese Patent Application No. 2003-054679, filed Feb.28, 2003, the entire contents of which are incorporated herein byreference.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention relates generally to an informationprocessing apparatus such as a personal computer, and more particularlyto an information processing apparatus capable of displaying image data.

[0004] 2. Description of the Related Art

[0005] In recent years, a variety of notebook or laptop personalcomputers have been developed. Most of these personal computers have afunction of handling image data such as motion video.

[0006] U.S. Pat. No. 6,297,794 discloses a computer capable of handlingimage data. In the system of this computer, motion video data from avideo source is transferred to a display controller via a dedicatedmotion video bus. Thereby, it is possible to prevent the system bus frombeing occupied by the transfer of motion video data.

[0007] In the system of U.S. Pat. No. 6,297,794, however, the displaycontroller connected to the system bus is used to control display ofmotion video data transferred via the dedicated motion video bus. Inusual cases, in an information processing apparatus such as a computer,each system device connected to the system bus becomes operable onlyafter the operating system is activated.

[0008] Thus, in the system of U.S. Pat. No. 6,297,794, it is necessaryto activate the operating system in advance, in order to display motionvideo data transferred via the dedicated motion video bus.

BRIEF SUMMARY OF THE INVENTION

[0009] According to an embodiment of the present invention, there isprovided an information processing apparatus comprising: a first systemincluding a central processing unit (CPU) capable of executing anoperating system, a first display controller that causes a displaydevice to display data, which is written in a memory by the CPU, aperipheral device having an interface and being capable of outputtingimage data via the interface, and a first controller that executescommunication with the peripheral device via the interface and receivesthe image data output from the peripheral device; and a second systemoperable independently of the first system, the second system including,a second controller that executes communication with the peripheraldevice via the interface and receives the image data output from theperipheral device, a second display controller that causes the displaydevice to display the image data, which is received by the secondcontroller, and a switch device that switches a destination ofconnection of the interface of the peripheral device from the firstcontroller to the second controller.

[0010] According to another embodiment of the present invention, thereis provided an information processing apparatus comprising: a peripheraldevice configured to be capable of outputting image data; a first systemincluding a central processing unit (CPU) that is capable of executingan operating system; a second system configured to be operableindependently of the first system, the second system including aprocessor that processes the image data output from the peripheraldevice; a switch device that switches a system, to which the peripheraldevice is to be connected, between the first system and the secondsystem; and a display control unit connected to the first system and thesecond system and configured to cause a display device to display dataoutput from at least one of the first system and the second system.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

[0011] The accompanying drawings, which are incorporated in andconstitute a part of the specification, illustrate embodiments of theinvention, and together with the general description given above and thedetailed description of the embodiments given below, serve to explainthe principles of the invention.

[0012]FIG. 1 shows an external appearance of a computer according to anembodiment of the present invention, with the display of the computerbeing opened;

[0013]FIG. 2 is a block diagram showing the system configuration of thecomputer shown in FIG. 1;

[0014]FIG. 3 is a block diagram showing an example of the structure of amultiplexer provided in the computer shown in FIG. 1;

[0015]FIG. 4 is a flow chart illustrating an example of a processprocedure executed by a stream controller provided in the computer shownin FIG. 1;

[0016]FIG. 5 is a flow chart showing an example of a process procedureexecuted when the computer shown in FIG. 1 is powered on;

[0017]FIG. 6 is a block diagram showing a second example of the systemconfiguration of the computer shown in FIG. 1; and

[0018]FIG. 7 is a block diagram showing an example of the structure of amultiplexer provided in the computer shown in FIG. 6.

DETAILED DESCRIPTION OF THE INVENTION

[0019] An embodiment of the present invention will now be described withreference to the accompanying drawings. To begin with, referring to FIG.1 and FIG. 2, the structure of an information processing apparatusaccording to the embodiment will be described. The informationprocessing apparatus is realized as a notebook-type personal computer byway of example.

[0020]FIG. 1 is a front view of the notebook-type personal computer inthe state in which a display unit thereof is opened. The computercomprises a computer main body 11 and a display unit 12. A displaydevice 121 composed of an LCD (Liquid Crystal Display) is built in thedisplay unit 12. The display unit 12 is attached to be rotatable betweenan open position and a closed position relative to the computer mainbody 11. The computer main body 11 has a thin box-shaped housing. Akeyboard 21, a touch pad 22, a left button 23 a and a right button 23 bare disposed on the upper surface of the computer main body 11.

[0021] A power button 14 is disposed on a rear part of the upper surfaceof the computer main body 11. The power button 14 is an operation buttonfor powering on/off the computer. A DVD (Digital Versatile Disk) drive25 is stored in a drive bay slot is provided on a side surface of thecomputer main body 11.

[0022] Further, video control buttons 26 are provided on a front surfaceof the computer main body 11. The video control buttons 26 is anoperation button group for controlling reproduction operations of imagedata such as motion video recorded on DVD media driven by the DVD drive25. The video control buttons 26 include a play button 26 a and a stopbutton 26 b. Image data read out of DVD media by the DVD drive 25 isdisplayed on the LCD 121.

[0023] This computer has a video reproduction function of displaying onthe LCD 121 the image data recorded on DVD media, without the need toboot the operating system (OS). A user can view image data recorded onDVD media by simply operating the video control buttons 26, withoutactivating the operating system (OS).

[0024]FIG. 2 shows the system configuration of the computer.

[0025] The computer comprises first and second systems. These twosystems operate independently in order to realize the above-describedvideo reproduction function. The first system has the same architectureas an ordinary computer and operates under control of the operatingsystem (OS). On the other hand, the second system is a dedicated systemfor displaying image data recorded on DVD media. The second systemoperates independently of the first system. The first and second systemsare built in the body 11.

[0026] The first system includes a CPU (central processing unit) 101that executes the operating system (OS). The second system includes astream controller 112 that is a processor for processing image datarecorded on DVD media.

[0027] The first system includes a PCI (Peripheral ComponentInterconnect) bus 1, an ISA (Industry Standard Architecture) bus 2, CPU101, a north bridge 102, a main memory 103, a first display controller104, a south bridge 105, a hard disk drive (HDD) 106, a plurality of PCIdevices 107, an embedded controller/ keyboard controller IC(EC/KBC) 108,a power supply controller 109, and a DVD drive 25.

[0028] The CPU 101 is a processor that is provided to control theoperation of the computer. The CPU 101 executes an operating system (OS)and an application program, which are loaded in the main memory 103 fromthe hard disk drive (HDD) 106. The operations of all the components ofthe first system are controlled by the CPU 101 that executes the OS.

[0029] The north bridge 102 is a bridge device that connects a local busof the CPU 101 and the south bridge 105. The north bridge 102 isprovided with a memory controller for controlling the main memory 103,and an AGP (Accelerated Graphics Port) interface for communication withthe display controller 104.

[0030] The display controller 104 is a graphics controller that controlsthe LCD 121 used as the display monitor of the computer. The displaycontroller 104 enables the LCD 121 to display data written in a videomemory (VRAM) 201 by the CPU 101.

[0031] The south bridge 105 is a bridge device for performingcommunications with various devices on the PCI bus 1 and various deviceson the ISA bus 2. The south bridge 105 includes an IDE (Integrated DriveElectronics) controller. In response to an access request from the CPU101, the south bridge 105 can control the IDE devices (HDD 106, DVDdrive 25). Each IDE device has a bus interface for connection to the IDEbus and is connected to the south bridge 105 via the IDE bus. The IDEbus includes a plurality of signal lines that are used for communicationbetween each IDE device and the host thereof. The south bridge 105functions as the host of the HDD 106 and DVD drive 25.

[0032] The embedded controller/keyboard controller IC (EC/KBC) 108 is asingle-chip microcomputer in which an embedded controller for powermanagement and a keyboard controller for controlling the keyboard (KB)21 are integrated.

[0033] The embedded controller/keyboard controller IC (EC/KBC) 108cooperates with the power supply controller 109 and powers on the firstsystem of the computer in response to a power-on signal produced fromthe power button 24. Specifically, when the power button 24 is operatedby the user, the power supply controller 109 generates a power supplyVCC1 in response to the power-on signal produced from the power button24. The power supply VCC1 is a power supply for activating therespective components of the first system.

[0034] Responding to supply of the power supply VCC1, the CPU 101 startsa bootstrap process for booting the operating system. In the bootstrapprocess, the CPU 101 also executes a process for initializing therespective components of the first system.

[0035] In addition, the EC/KBC 108 powers on the second system of thecomputer in response to a reproduction instruction signal that isproduced from the play button 26 a included in the video control buttons26. Specifically, when the play button 26 a of the video control buttons26 is operated by the user, the power supply controller 109 generates apower supply VCC2 in response to a reproduction instruction signalproduced from the play button 26 a. The power supply VCC2 is a powersupply for activating the respective components of the second system.When the stop button is operated by the user, the power supply VCC2 isstopped.

[0036] The DVD drive 25 is a peripheral device that outputs image datasuch as motion video. The DVD drive 25 is supplied with both the powersupply VCC1 and power supply VCC2 as its operational power supply.Thereby, the DVD drive 25 can operate not only when the computer ispowered on, but also when the play button of the video control buttons26 is operated.

[0037] The second system includes a multiplexer (MUX) 111, a streamcontroller 112, a memory 113, an MPEG2 decoder 114 and a second displaycontroller 115.

[0038] The multiplexer (MUX) 111 is a switch device that selectivelyconnects the IDE bus interface of the DVD drive 25 to the south bridge105 and the stream controller 112. When the play button 26 a of videocontrol buttons 26 is operated, the multiplexer (MUX) 111 switches thedestination of connection of the IDE bus interface of the DVD drive 25from the south bridge 105 to the stream controller 112, connecting theDVD drive 25 to the second system.

[0039] The multiplexer (MUX) 111 is used to switch the destination ofconnection of the DVD drive 25 between the first system and the secondsystem. In this sense, the multiplexer (MUX) 111 is regarded as a deviceindependent of the first system and the second system.

[0040] The stream controller 112 is a device for controlling theoperation of the second system, and it includes a processor. Theprocessor of the stream controller 112 executes a control program storedin the memory 113. The memory 113 includes a nonvolatile memory storingthe control program and a DRAM serving as a working memory.

[0041] The stream controller 112 is configured to process image dataread out of the DVD drive 25. The stream controller 112 transmitsoperation commands to the MPEG2 decoder 114 and second displaycontroller 115 via a control bus 211, thereby controlling the MPEG2decoder 114 and second display controller 115. The stream controller 112includes an IDE controller and is able to control the DVD drive 25 viathe IDE bus. Image data read out of the DVD drive 25 is data that iscompression-encoded by MPEG2.

[0042] The MPEG2 decoder 114 decodes the compression-encoded image data.The data format of the decoded image data output from the MPEG2 decoder114 is digital YUV (R656). The decoded image data is sent to the seconddisplay controller 115.

[0043] The second display controller 115 controls the LCD 121 that isused as the display monitor of the computer. The second displaycontroller 115 converts the YUV format of image data output from theMPEG2 decoder 114 to RGB format, and causes the LCD 121 to display theRGB-format image data.

[0044] If the number of RGB data input ports provided on the LCD 121 isone, a multiplexer (MUX) 116 needs to be provided in front of the RGBdata input port of the LCD 121. The first system and second systembasically operate in a mutually exclusive manner. The multiplexer (MUX)116 delivers RGB data output from either the first display controller104 or the second display controller 115 to the LCD 121.

[0045] The first and second display controllers 104 and 115 may berealized as a single display control unit. Additionally, the function ofthe multiplexer (MUX) 116 may be incorporated in the display controlunit. The display control unit has a port for receiving image data fromthe first system and a port for receiving image data from the secondsystem. The display control unit causes the LCD 121 to display at leastone of image data output from the first system and image data outputfrom the second system.

[0046] The stream controller 112, MPEG2 decoder 114 and second displaycontroller 115 are driven by the power supply VCC2. Each of themultiplexers 111 and 116 is supplied with both the power supply VCC1 andpower supply VCC2 as its operational power supply.

[0047] Next, the path of transfer of image data is described.

[0048] The DVD drive 25 is shared by the first and second systems.Either the first system or the second system can cause the LCD 121 todisplay image data recorded on DVD media.

[0049] In the first system, as indicated by a dot-and-dash line in FIG.2, image data output from the DVD drive 25 is transferred to the firstdisplay controller 104 via the multiplexer 111, south bridge 105 andnorth bridge 102. This transfer operation is executed under control ofthe CPU 101.

[0050] Specifically, the CPU 101 first controls the multiplexer 111 viathe south bridge 105, thereby switching the destination of connection ofthe IDE bus interface of DVD drive 25 to the south bridge 105 side.According to an access request from the CPU 101, the south bridge 105executes communication with the DVD drive 25 via the IDE bus. Thereby,the south bridge 105 receives image data from the DVD drive 25 via theIDE bus. The image data received by the south bridge 105 is once storedin the main memory 103 and decoded by the CPU 101. Then, the CPU 101writes the decoded image data into the VRAM 201.

[0051] The image data written in the VRAM 201 is displayed on the LCD121 by the first display controller 104. The CPU 101 can write into theVRAM 201 not only the image data from the DVD drive 25 but also graphicsdata generated by application programs. Thereby, in the first system,the LCD 121 is enabled to display, for example, a screen image in whichimage data from the DVD drive 25 is overlaid on graphics data.

[0052] In the second system, as indicated by a broken line in FIG. 2,image data output from the DVD drive 25 is transferred to the seconddisplay controller 115 via the multiplexer 111, stream controller 112and MPEG2 decoder 114. This transfer operation is executed under controlof the stream controller 112.

[0053] Specifically, the stream controller 112 controls the multiplexer111, thereby switching the destination of connection of the IDE businterface of DVD drive 25 to the stream controller 112 side. The streamcontroller 112 executes communication with the DVD drive 25 via the IDEbus. Thereby, the stream controller 112 receives, via the IDE bus, imagedata output from DVD drive 25. The image data received by the streamcontroller 112 is decoded by the MPEG2 decoder 114 and transferred tothe second display controller 115. The second display controller 115causes the LCD 121 to display the image data decoded by the MPEG2decoder 114.

[0054] As has been described above, in this computer, the use of thesecond system makes it possible to cause the LCD 121 to display imagedata output from the DVD drive 25, without using the buses and devicesin the first system. The second system is activated in response to thedepression of the play button 26 a of video control buttons 26, and theoperation of the second system is stopped in response to the depressionof the stop button 26b of video control buttons 26. Therefore, the usercan view image data such as motion video recorded on DVD media, withoutthe need to power on the computer, that is, without the need to boot theoperating system.

[0055] Further, the second display controller 115 includes a TV encoder.The TV encoder converts the image data decoded by the MPEG2 decoder 114to a video signal (e.g. NTSC signal) that is to be output to an externalTV receiver. If the video signal output from the computer is supplied tothe TV receiver via a cable, the image data such as motion videorecorded on DVD media can be displayed on the TV receiver.

[0056] The video control buttons 26 are provided on the front surface ofthe computer main body 11. Thus, the video control buttons 26 can beoperated in the state in which the display unit 12 is closed. Therefore,image data recorded on DVD media can be displayed on the TV receiver,without the need to open the display unit 12.

[0057] The structure of the multiplexer 111 is described with referenceto FIG. 3.

[0058] The multiplexer 111, as shown in FIG. 3, includes first to thirdbus interface units 501, 502 and 503. The first bus interface unit 501is connected to an IDE bus interface 251 of the DVD drive 25 via the IDEbus. The second bus interface unit 502 is connected to the streamcontroller 112 via the IDE bus. The third bus interface unit 503 isconnected to the south bridge 105 via the IDE bus.

[0059] The multiplexer 111 further includes a plurality of selectors504. The number of selectors 504 is equal to the number of signal linesdefined in the IDE bus. The selectors 504 constitute a switch circuitthat switches the destination of connection of the IDE bus interface 251of DVD drive 25 between the stream controller 112 and south bridge 105.

[0060] Specifically, the selectors 504 select one of the second andthird bus interface units 502 and 503 and electrically connect theselected bus interface unit to the first bus interface unit 501. Theselection of the bus interface unit is effected by select signals SEL1and SEL2.

[0061] The select signal SEL1 is a signal that is supplied from thestream controller 112 to the multiplexer 111, and it indicates that thestream controller 112 is to be selected, that is, the second businterface unit 502 is to be selected. When the play button 26 a isdepressed, the stream controller 112 generates the select signal SEL1.When the stop button 26 b is depressed, the stream controller 112 stopsthe generation of the select signal SEL1.

[0062] The select signal SEL2 is a signal that is supplied from thesouth bridge 105 to the multiplexer 111, and it indicates that the southbridge 105 is to be selected, that is, the third bus interface 503 is tobe selected. When the computer is powered on, the south bridge 105generates the select signal SEL2.

[0063] Upon receiving the select signal SEL1, the multiplexer 111connects the second bus interface unit 502 to the first bus interfaceunit 501, in order to electrically connect the DVD drive 25 to thestream controller 112. On the other hand, upon receiving the selectsignal SEL2, the multiplexer 111 connects the third bus interface unit503 to the first bus interface unit 501, in order to electricallyconnect the DVD drive 25 to the south bridge 105. It is possible to givepriority to the select signal SEL2 over the select signal SEL1. In thiscase, if the select signal SEL2 is generated while the select signalSEL1 is being generated, the multiplexer 111 connects the third businterface unit 503 to the first bus interface unit 501.

[0064] The stream controller 112 includes a processor (MPU) 301 and anIDE controller 302. Responding to a command from the processor (MPU)301, the IDE controller 302 accesses the DVD drive 25 and reads datafrom the DVD drive 25.

[0065] The south bridge 105 includes an IDE controller 401. Respondingto a command from the CPU 101, the IDE controller 401 accesses the DVDdriver 25 and reads data from the DVD drive 25.

[0066] The stream controller 112 and south bridge 105 are connected to aserial bus 3 such as an I²C bus. The stream controller 112 and southbridge 105 can communicate with each other via the serial bus 3.

[0067] Referring now to a flow chart of FIG. 4, a description is givenof the process executed by the processor 301 of the stream controller112.

[0068] Assume that the user has operated the play button 26 a of videocontrol buttons 26 while the computer is in the power-off state.

[0069] Responding to the operation of the play button 26 a, the powersupply controller 109 supplies power VCC2 to the second system. Thesecond system is thus activated. The processor 301 of stream controller112 first executes a process for initializing the MPEG2 decoder 114 andsecond display controller 115 via the control bus 211 (steps S101 andS102). Then, the processor 301 supplies the select signal SEL1 to themultiplexer 111, thereby switching the destination of connection of theIDE bus interface 251 of DVD drive 25 to the stream controller 112 (stepS103).

[0070] The processor 301 initializes the DVD drive 25 via the IDEcontroller 302, following which the processor 301 executes read accessto the DVD drive 25 and receives data read out of the DVD drive 25 (stepS104). In step S104, communication between the IDE controller 302 andDVD drive 25 is executed according to the procedure of the IDE standard.Thereby, image data stored on DVD media is read out of the DVD drive 25via the IDE bus.

[0071] The processor 301 receives read data from the DVD drive 25 andtransfers it to the MPEG2 decoder 114 (step S105). In step S105, theprocessor 301 executes a process for converting the read data from theDVD drive 25 to an MPEG2 program stream. The data read out of the DVDdrive 25 is transferred from the processor 301 to the MPEG2 decoder 114as the MPEG2 program stream. Thereafter, the processor 301 decodes theimage data (MPEG2 program stream) using the MPEG2 decoder 114, andinstructs the second display controller 115 to cause the LCD 121 todisplay the decoded image data (steps S106 and S107).

[0072] By the above-described processing, image data such as motionvideo can be displayed without the need to activate the operatingsystem. If the user depresses the stop button 26 b subsequently, thesupply of the power VCC2 to the second system is stopped and theoperation of the second system is halted.

[0073] Next, the operation of the first system is described referring toa flow chart of FIG. 5.

[0074] When the user depresses the power button 24, the power supplycontroller 109 supplies power VCC1 to the first system. The bootstrapprocess for booting the operating system is started. If the operatingsystem is bootstrapped (YES in step S201), the CPU 101 executes thefollowing process under control of the operating system.

[0075] The CPU 101 supplies to the south bridge 105 a command forinstructing generation of the select signal SEL2, and thus the selectsignal SEL2 is generated (step S202). Thereby, the multiplexer 111connects the DVD drive 25 to the south bridge 105. The CPU 101 readsstatus data from the register in the DVD drive 25 and determines, on thebasis of the value of the status data, whether the DVD drive 25 isalready initialized (step S203).

[0076] If the DVD drive 25 is not initialized (NO in step S203), the CPU101 initializes the DVD drive 25 (step S204). If the DVD drive 2 isalready initialized (YES in step S203), the CPU 101 determines that thesecond system is in operation and issues to the stream controller 112 acommand indicating that the select signal SEL2 should be turned off(step S205). This command is sent from the south bridge 105 to thestream controller 112 via the serial bus 3. Upon receiving the command,the stream controller 112 stops the generation of the select signal SEL1and halts the access operation to the DVD drive 25.

[0077]FIG. 6 shows a second example of the system configuration of thecomputer.

[0078] The computer shown in FIG. 6 is configured such that a TV tuner601, instead of DVD drive 25, is shared by the first and second systems.In the other respects, the configuration of FIG. 6 is the same as thatof FIG. 2.

[0079] The TV tuner 601 is a peripheral device that outputs image data.The TV tuner 601 receives broadcast program data such as TV programs viaa TV antenna and outputs the received broadcast program data. The TVtuner 601 is supplied with both the power supply VCC1 and power supplyVCC2 as its operational power supply. Thereby, the TV tuner 601 canoperate not only when the computer is powered on, but also when the playbutton 26 a of the video control buttons 26 is operated.

[0080] The TV tuner 601 has a bus interface including a plurality ofsignal lines. The bus interface is connected to the multiplexer 111.Upon receiving the select signal SEL1, the multiplexer 111 connects thebus interface of the TV tuner 601 to the stream controller 112. On theother hand, upon receiving the select signal SEL2, the multiplexer 111connects the bus interface of the TV tuner 601 to the south bridge 105.

[0081] In the structure shown in FIG. 6, when the first system isactivated, broadcast program data received by the TV tuner 601 isdisplayed on the LCD 121 via the multiplexer 111, south bridge 105,north bridge 102 and first display controller 104, as indicated by adot-and-dash line in FIG. 6. On the other hand, when the second systemis activated, broadcast program data received by the TV tuner 601 isdisplayed on the LCD 121 via the multiplexer 111, stream controller 112,MPEG2 decoder 114 and second display controller 115, as indicated by abroken line in FIG. 6. In a case where the broadcast program datareceived by the TV tuner 601 is not an MPEG stream, the broadcastprogram data bypasses the MPEG2 decoder 114.

[0082] Besides, as indicated by a two-dot-and-dash line in FIG. 6, whilebroadcast data is being displayed on the LCD 121 by the second system,the broadcast data may be recorded on the HDD 106 in the first system.In this case, the multiplexer 111 simultaneously supplies the broadcastprogram data, which is received by the TV tuner 601, to the south bridge105 and stream controller 112.

[0083]FIG. 7 shows an example of the structure of the multiplexer 111associated with the system shown in FIG. 6.

[0084] The TV tuner 601 has an interface 601 a for outputting receivedbroadcast program data. The interface 601 a includes a plurality (n) ofsignal lines. The multiplexer 111 includes an n-number of 2-input ANDgates 701 for connecting the interface 601 a to the stream controller112, and an n-number of 2-input AND gates 801 for connecting theinterface 601 a to the south bridge 105.

[0085] First inputs of the n-number of 2-input AND gates 701 areconnected to the n-number of signal lines, respectively. Second inputsof the n-number of 2-input AND gates 701 are connected to the selectsignal SEL1. Similarly, first inputs of the n-number of 2-input ANDgates 801 are connected to the n-number of signal lines, respectively.Second inputs of the n-number of 2-input AND gates 801 are connected tothe select signal SEL2. The n-number of 2-input AND gates 701 aregate-controlled by the select signal SEL1, and the n-number of 2-inputAND gates 801 are gate-controlled by the select signal SEL2. Themultiplexer 111 operates in one of the following modes 1, 2 and 3.

Operation Mode 1

[0086] When the select signal SEL1 is generated and the select signalSEL2 is not generated, the multiplexer 111 connects the interface 601 aof TV tuner 601 to the stream controller 112. Broadcast program datareceived by the TV tuner 601 is sent to the stream controller 112.

Operation Mode 2

[0087] When the select signal SEL2 is generated and the select signalSEL1 is not generated, the multiplexer 111 connects the interface 601 aof TV tuner 601 to the south bridge 105. Broadcast program data receivedby the TV tuner 601 is sent to the south bridge 105.

Operation Mode 3

[0088] When both the select signal SEL1 and select signal SEL2 aregenerated, the multiplexer 111 connects the interface 601 a of TV tuner601 to the stream controller 112 and south bridge 105. Broadcast programdata received by the TV tuner 601 is sent to the stream controller 112and south bridge 105.

[0089] As has been described above, the computer of this embodimentcomprises the first system including the CPU 101 that executes theoperating system and the second system including the stream controller112 that is the processor operable independently of the first system.When image data is to be displayed by the second system, the destinationof connection of the peripheral device, such as DVD drive 25 or TV tuner601, is switched by the multiplexer 111 from the first system to thesecond system. The first and second systems include the displaycontrollers 104 and 115, respectively. Image data output from theperipheral device is sent to the display controller 115 provided in thesecond system. Thereby, image data such as motion video can be displayedwithout the need to activate the operating system.

[0090] The two display controllers 104 and 115, as mentioned above, maybe realized as a single display control unit including a port forreceiving data from the first system and a port for receiving data fromthe second system.

[0091] Additional advantages and modifications will readily occur tothose skilled in the art. Therefore, the invention in its broaderaspects is not limited to the specific details and representativeembodiments shown and described herein. Accordingly, variousmodifications may be made without departing from the spirit or scope ofthe general inventive concept as and their equivalents.

What is claimed is:
 1. An information processing apparatus comprising: afirst system including a CPU capable of executing an operating system, afirst display controller that causes a display device to display data,which is written in a memory by the CPU, a peripheral device having aninterface and being capable of outputting image data via the interface,and a first controller that executes communication with the peripheraldevice via the interface and receives the image data output from theperipheral device; and a second system operable independently of thefirst system, the second system including, a second controller thatexecutes communication with the peripheral device via the interface andreceives the image data output from the peripheral device, a seconddisplay controller that causes the display device to display the imagedata, which is received by the second controller, and a switch devicethat switches a destination of connection of the interface of theperipheral device from the first controller to the second controller. 2.The information processing apparatus according to claim 1, wherein thesecond controller includes a processor that controls the peripheraldevice and the second display controller.
 3. The information processingapparatus according to claim 1, further comprising: a housing includingthe first system and the second system; a power button that is providedon the housing and outputs a power-on signal indicating that theinformation processing apparatus is to be powered on; an operationbutton that is provided on the housing and outputs a reproductioninstruction signal instructing image reproduction; and a power supplyunit that is provided in the housing and supplies power to the firstsystem in response to the power-on signal and supplies power to thesecond system and the peripheral device in response to the reproductioninstruction signal.
 4. The information processing apparatus according toclaim 3, wherein the second controller includes a processor thatcontrols the peripheral device and the second display controller, andthe processor includes means for executing a process for initializingthe peripheral device and the second display controller in response tothe supply of power to the second system.
 5. The information processingapparatus according to claim 1, wherein the image data includescompression-encoded data, and the second system further includes adecoder that decodes the image data received by the second controller.6. The information processing apparatus according to claim 1, whereinthe second system further includes means for converting the image datareceived by the second controller to a video signal that is to be outputto an external TV receiver.
 7. The information processing apparatusaccording to claim 1, wherein the interface of the peripheral deviceincludes a plurality of signal lines, and the switch device includes aswitch circuit that electrically connects the plurality of signal linesof the interface to one of the first controller and the secondcontroller.
 8. The information processing apparatus according to claim1, wherein the interface of the peripheral device includes a pluralityof signal lines, and the switch device includes a switch circuit that isconfigured to electrically connect the plurality of signal lines to thefirst controller in response to a first switch signal supplied from thefirst controller, and electrically connect the plurality of signal linesto the second controller in response to a second switch signal suppliedfrom the second controller.
 9. The information processing apparatusaccording to claim 1, wherein the peripheral device includes a driveunit that drives a storage medium.
 10. The information processingapparatus according to claim 1, wherein the peripheral device includes areceiving device that receives broadcast program data.
 11. Aninformation processing apparatus comprising: a peripheral deviceconfigured to output image data; a first system including a centralprocessing unit (CPU) that is capable of executing an operating system;a second system configured to be operable independently of the firstsystem, the second system including a processor that processes the imagedata output from the peripheral device; a switch device that switches asystem, to which the peripheral device is to be connected, between thefirst system and the second system; and a display control unit connectedto the first system and the second system and configured to cause adisplay device to display data output from at least one of the firstsystem and the second system.
 12. The information processing apparatusaccording to claim 11, further comprising: a first operation button thatactivates the first system; and a second operation button that activatesthe second system.
 13. The information processing apparatus according toclaim 11, the switch device is configured to be operable in one of afirst operation mode in which the peripheral device is connected to thefirst system, a second operation mode in which the peripheral device isconnected to the second system, and a third operation mode in which theperipheral device is connected to the first system and the secondsystem.